Media Storage Type : DVD-ROM
NPTEL Course Name : VLSI Design Verification and Test
NPTEL Subject Matter Expert : Dr. Santosh Biswas
NPTEL Co-ordinating Institute : IIT Guwahati
NPTEL Lecture Count : 31
Lecture Titles:
Lecture 1 - Introduction to Digital VLSI Design Flow
Lecture 2 - High Level Design Representation
Lecture 3 - Transformations for High Level Synthesis
Lecture 4 - Introduction to HLS: Scheduling, Allocation and Binding Problem
Lecture 5 - Scheduling Algorithms
Lecture 6 - Binding and Allocation Algorithms
Lecture 7 - Two level Boolean Logic Synthesis
Lecture 8 - Heuristic Minimization of Two-Level
Lecture 9 - Finite State Machine Synthesis
Lecture 10 - Multilevel Implementation
Lecture 11 - Introduction and construction
Lecture 12 - Ordered Binary Decision Diagram
Lecture 13 - Operations on Ordered Binary Decision Diagram
Lecture 14 - Ordered Binary Decision Diagram for Sequential Circuits
Lecture 15 - Introduction and Basic Operations on Temporal Logic
Lecture 16 - Syntax and Semantics of CLT
Lecture 17 - Equivalence between CTL Formulas
Lecture 18 - Verification Techniques
Lecture 19 - Model Checking Algorithm
Lecture 20 - Symbolic Model Checking
Lecture 21 - Introduction to Digital VLSI Testing
Lecture 22 - Functional and Structural Testing
Lecture 23 - Fault Equivalence
Lecture 24 - Fault Simulation
Lecture 25 - Testability Measures (SCOAP)
Lecture 26 - Introduction to Automatic Test Pattern Generation (ATPG) and ATPG Algebras
Lecture 27 - D-Algorithm
Lecture 28 - ATPG for Synchronous Sequential Circuits
Lecture 29 - Scan Chain based Sequential Circuit Testing
Lecture 30 - Built in Self Test,11. Built in Self test (BIST)
Lecture 31 - Memory Testing,11. Built in Self test (BIST)