NOC:Computer Organization and Architecture (USB)

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106106166



Media Storage Type : 32 GB USB Stick

NPTEL Subject Matter Expert : Prof. V. Kamakoti

NPTEL Co-ordinating Institute : IIT Madras

NPTEL Lecture Count : 52

NPTEL Course Size : 23 GB

NPTEL PDF Text Transcription : Available and Included

NPTEL Subtitle Transcription : Available and Included (SRT)


Lecture Titles:

Lecture 1 - Introduction High Speed Circuit - Design Recursive Doubling
Lecture 2 - High Speed Circuit Design - Fast Adder Circuits
Lecture 3 - Lab 1 : Introduction
Lecture 4 - Fast Adder Circuits (Continued...)
Lecture 5 - Fast Multiplier Circuit
Lecture 6 - Fast Multiplier Circuit (Continued...)
Lecture 7 - Programming using X86 ISA - Addressing Modes
Lecture 8 - Programming using X86 ISA - Addressing Modes
Lecture 9 - Floating point - Precision and Accuracy
Lecture 10 - Floating Point - Addition, Subtraction and Multiplication
Lecture 11 - Instruction Set Architecture
Lecture 12 - Instruction Set Architecture (Continued...)
Lecture 13 - Lab 2 : Segmentation - Part I
Lecture 14 - Lab 2 : Segmentation - Part II
Lecture 15 - Lab 2 : Segmentation - Part III
Lecture 16 - Orthogonal ISA, C Constructs Mapping, Addressing Modes
Lecture 17 - Atomic and Predicated Instructions
Lecture 18 - Atomic and Predicated Instructions (Continued...)
Lecture 19 - General Purpose Registers
Lecture 20 - Expanding opcodes
Lecture 21 - Introduction to Pipelining
Lecture 22 - Pipelining
Lecture 23 - Data Hazards
Lecture 24 - Lab 2 : Instruction Scheduling - Static and Dynamic
Lecture 25 - Dynamic Instruction Scheduling
Lecture 26 - Dynamic Instruction Scheduling (Continued...)
Lecture 27 - Control Hazard, Branch Prediction
Lecture 28 - Process Management
Lecture 29 - Branch prediction
Lecture 30 - Global Branch Prediction
Lecture 31 - Structural Hazard, Architectural Enhancements
Lecture 32 - Lab 3 : Virtual Memory
Lecture 33 - Locality of Reference, Demand paging
Lecture 34 - Page Replacement Algorithm
Lecture 35 - Multilevel Paging, Translational Lookaside Buffer
Lecture 36 - Multilevel Paging
Lecture 37 - Multilevel Paging - Part 1
Lecture 38 - Page Frame Allocation, Beledy's Anomaly
Lecture 39 - Paging, Cache
Lecture 40 - Cache
Lecture 41 - Cache Organisation
Lecture 42 - Cache - Cache Coherency, Dual Ported Cache
Lecture 43 - Multilevel Caching, Multitasking
Lecture 44 - Cache, Degree of Multiprogramming
Lecture 45 - Shared Memory Architecture
Lecture 46 - Shared Memory Architecture - Part I
Lecture 47 - Virtually Indexed - Virtually Tagged and Physically Tagged Caches
Lecture 48 - Lab 4 : Task Switching (Continued...)
Lecture 49 - Shared Memory Architecture, Cache Coherence
Lecture 50 - Concurrent Programming in Hardware - Part I
Lecture 51 - Concurrent Programming in Hardware - Part II
Lecture 52 - Conclusion : Recent Trends in Computer Organization and Architecture

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