NOC:Architectural Design of Digital Integrated Circuits (USB)

₹950.00
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Media Storage Type : 32 GB USB Stick

NPTEL Subject Matter Expert : Prof. Indranil Hatai

NPTEL Co-ordinating Institute : IIT Kharagpur

NPTEL Lecture Count : 67

NPTEL Course Size : 4.9 GB

NPTEL PDF Text Transcription : Available and Included

NPTEL Subtitle Transcription : Available and Included (SRT)


Lecture Titles:

Lecture 1 - Introduction to VLSI Design Flow
Lecture 2 - Introduction to VLSI Design Flow
Lecture 3 - Introduction to VLSI Design Flow
Lecture 4 - Algorithm to Efficient Architecture Mapping
Lecture 5 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 6 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 7 - Tutorial on Algorithm to Efficient Architecture Mapping
Lecture 8 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 9 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 10 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 11 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 12 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 13 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 14 - Algorithm to Efficient Architecture Mapping (Continued...)
Lecture 15 - Efficient Adder Architecture
Lecture 16 - Efficient Adder Architecture (Continued...)
Lecture 17 - Efficient Adder Architecture (Continued...)
Lecture 18 - Efficient Adder Architecture
Lecture 19 - Efficient Adder Architecture
Lecture 20 - Efficient Adder Architecture
Lecture 21 - Efficient Adder Architecture
Lecture 22 - Efficient Adder Architecture
Lecture 23 - Efficient Adder Architecture
Lecture 24 - Efficient Adder Architecture
Lecture 25 - Pipelining and Parallel Processing
Lecture 26 - Pipelining and Parallel Processing
Lecture 27 - Multiplier Architecture
Lecture 28 - Multiplier Architecture
Lecture 29 - Multiplier Architecture
Lecture 30 - Multiplier Architecture
Lecture 31 - Multiplier Architecture
Lecture 32 - Multiplier Architecture
Lecture 33 - Multiplier Architecture
Lecture 34 - Multiplier Architecture
Lecture 35 - Squaring Circuit Design
Lecture 36 - Reconfigurable Constant Multiplier Design
Lecture 37 - Reconfigurable Constant Multiplier Design
Lecture 38 - Reconfigurable Constant Multiplier Design
Lecture 39 - Fixed Point Number Representation
Lecture 40 - Fixed Point Number Representation
Lecture 41 - CORDIC Architecture
Lecture 42 - CORDIC Architecture
Lecture 43 - CORDIC Architecture
Lecture 44 - CORDIC Architecture
Lecture 45 - Timing Analysis
Lecture 46 - Timing Analysis
Lecture 47 - Timing Analysis
Lecture 48 - Logic Hazard
Lecture 49 - FFT Architecture
Lecture 50 - FFT Architecture (Continued...)
Lecture 51 - Timing analysis Basics
Lecture 52 - Timing analysis Basics (Continued...)
Lecture 53 - Timing analysis Basics (Continued...)
Lecture 54 - Timing Issuesin Digital IC Design
Lecture 55 - Timing Issuesin Digital IC Design (Continued...)
Lecture 56 - Timing Issuesin Digital IC Design (Continued...)
Lecture 57 - Timing Issuesin Digital IC Design (Continued...)
Lecture 58 - Architectural Design of Digital Integrated Circuits
Lecture 59 - Design Tips for Basic Circuits Design (Continued...)
Lecture 60 - Design Tips for Basic Circuits Design (Continued...)
Lecture 61 - Design Tips for Basic Circuits Design (Continued...)
Lecture 62 - Low Power Digital Design
Lecture 63 - Low Power Digital Design (Continued...)
Lecture 64 - Low Power Digital Design
Lecture 65 - Low Power Digital Design (Continued...)
Lecture 66 - Hardware for Machine Learning: Design Considerations Design Tips
Lecture 67 - Hardware for Machine Learning: Design Considerations Design Tips (Continued...)

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