Media Storage Type : DVD-ROM
NPTEL Course Name : CAD for VLSI Design - I
NPTEL Subject Matter Expert : Prof. V. Kamakoti
NPTEL Co-ordinating Institute : IIT Madras
NPTEL Lecture Count : 40
Lecture Titles:
Lecture 1 - Evolution of CAD Tools
Lecture 2 - Importance of Design Automation
Lecture 3 - Basic Transistor Fundamentals
Lecture 4 - Gate Level Modeling
Lecture 5 - Higher Levels of Modeling
Lecture 6 - Types of CAD Tools
Lecture 7 - Verilog Quick Starter
Lecture 8 - Introduction to Simulators
Lecture 9 - Verilog Syntax
Lecture 10 - Verilog - Operators and expressions
Lecture 11 - Hierarchical Design and methodology
Lecture 12 - Delay modeling
Lecture 13 - Delay Modeling (Continued...)
Lecture 14 - Blocking and Non Blocking Assignments
Lecture 15 - Behavioural Modeling
Lecture 16 - Verilog Tasks and Functions
Lecture 17 - Memory Modeling
Lecture 18 - Advanced Delay Modeling
Lecture 19 - Advanced Delay Modeling (Continued...)
Lecture 20 - Verilog Tricks
Lecture 21 - Introduction to Logic Synthesis
Lecture 22 - Logic Synthesis (Continued...)
Lecture 23 - Logic Synthesis (Continued...)
Lecture 24 - Synthesis: Assignment Statements
Lecture 25 - Synthesis: Arithmetic Operators
Lecture 26 - Synthesis: Bit Selects
Lecture 27 - Synthesis: Conditional Statements
Lecture 28 - Synthesis: Case Statements
Lecture 29 - Synthesis: Case Statements (Continued...)
Lecture 30 - Synthesis: Loops
Lecture 31 - Synthesis: Local and Integer Variables
Lecture 32 - Synthesis: Flip Flops with preset / clear
Lecture 33 - Synthesis: Blocking Vs Non Blocking Assignments
Lecture 34 - Synthesis: Unknowns and High Impedance
Lecture 35 - Optimization in Synthesis
Lecture 36 - Optimization in Synthesis (Continued...)
Lecture 37 - Introduction to Reconfigurable Computing
Lecture 38 - Introduction to FPGAs
Lecture 39 - Introduction to FPGAs (Continued...)
Lecture 40 - The Altera Quartus Flow