NPTEL : Electronic Design Automation (Computer Science and Engineering)

Co-ordinators : Prof. Indranil Sengupta


Lecture 1 - Introduction

Lecture 2 - Verilog : Part - I

Lecture 3 - Verilog : Part - II

Lecture 4 - Verilog : Part - III

Lecture 5 - Verilog : Part - IV

Lecture 6 - Verilog : Part - V

Lecture 7 - Verilog : Part - VI

Lecture 8 - Synthesis : Part - I

Lecture 9 - Synthesis : Part - II

Lecture 10 - Synthesis : Part - III

Lecture 11 - Synthesis : Part - IV

Lecture 12 - Synthesis : Part - V

Lecture 13 - Synthesis : Part - VI

Lecture 14 - Synthesis : Part - VII

Lecture 15 - Backend Design : Part - I

Lecture 16 - Backend Design : Part - II

Lecture 17 - Backend Design : Part - III

Lecture 18 - Backend Design : Part - IV

Lecture 19 - Backend Design : Part - V

Lecture 20 - Backend Design : Part - VI

Lecture 21 - Backend Design : Part - VII

Lecture 22 - Backend Design : Part - VIII

Lecture 23 - Backend Design : Part - IX

Lecture 24 - Backend Design : Part - X

Lecture 25 - Backend Design : Part - XI

Lecture 26 - Backend Design : Part - XII

Lecture 27 - Backend Design : Part - XIII

Lecture 28 - Backend Design : Part - XIV

Lecture 29 - Backend Design : Part - XV

Lecture 30 - Testing Part - I

Lecture 31 - Testing Part - II

Lecture 32 - Testing Part - III

Lecture 33 - Testing Part - IV

Lecture 34 - Testing Part - V

Lecture 35 - Testing Part - VI